Field of the Disclosure
The present disclosure relates to a display device.
Description of the Background
In a display device, data lines and gate lines are arranged to intersect at right angles, and pixels are arranged in a matrix form. Video data voltages to be displayed are applied to the data lines, and scan signals are sequentially supplied to the gate lines. The pixels on display lines to which the scan signals are supplied are supplied with the video data voltages, and video data is displayed as all the display lines are sequentially scanned by the scan signals.
In the display device, the gate driver which generates scan signals may be implemented in the form of a gate-in-panel (hereinafter, “GIP”) constituted by a combination of thin-film transistors, on the bezel of the display panel where no image is displayed. The GIP-type gate driver has the number of stages corresponding to the number of gate lines, and the stages output scan signals to the gate lines on a one-to-one basis.
FIG. 1 is a schematic view showing an example of a stage of a shift register in a display device according to the related art.
Referring to FIG. 1, the stage comprises a pull-up transistor Tpu that outputs a scan signal Gouti corresponding to the timing of a clock signal in response to a Q node voltage, and a pull-down transistor Tpd that discharges a voltage at an output terminal Nout in response to a QB node voltage. A first transistor T1 pre-charges the Q node in response to a start pulse VST. A second transistor T2 discharges the Q node in response to a next stage signal VNEXT, and a third transistor T3 discharges the Q node in response to the QB node voltage. A node controller NCON is made up of a combination of transistors that can stably charge and discharge the Q node and the QB node.
While the Q node maintains a high-potential voltage during a period in which a scan signal Gouti is output and the QB node maintains the high-potential voltage during the other periods, the third transistor T3 and the pull-down transistor Tpd remain turned on. In one frame, the period in which the scan signal Gouti is output is very short, so the QB node maintains the high-level voltage during most of the one frame. As a result, the third transistor T3 and the pull-down transistor Tpd are subjected to DC stress for a long time compared to other transistors, thus causing changes in their characteristics. This makes the stage operation unstable.